Title:
FREQUENCY DIVIDER CIRCUIT AND SIGNAL PROCESSOR
Document Type and Number:
Japanese Patent JP2002124869
Kind Code:
A
Abstract:
To provide a frequency divider circuit which can suppress generation of noise signals in other signal processing circuits.
The frequency divider circuit is provided with a ring counter constitution part comprising a plurality of cascade connected latch circuits. An input signal is input to the clock input terminal of each latch circuit. The output from the latch circuit at any stage is sent out as the output signal which is the divided frequency of the input signal.
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Inventors:
MATSUMOTO SHUICHI
YOSHIDA YOSHIKAZU
YOSHIDA YOSHIKAZU
Application Number:
JP2000314144A
Publication Date:
April 26, 2002
Filing Date:
October 13, 2000
Export Citation:
Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H03K21/00; H03K23/54; (IPC1-7): H03K23/54; H03K21/00
Attorney, Agent or Firm:
Nobuyuki Kudo
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