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Title:
FREQUENCY OFFSET COMPENSATION CIRCUIT
Document Type and Number:
Japanese Patent JPH08223240
Kind Code:
A
Abstract:

PURPOSE: To allow a frequency offset compensation circuit compensating automatically a frequency error between transmission and reception of a digital signal to attain frequency offset compensation for an MLSE equalizer with high accuracy at a high speed.

CONSTITUTION: The circuit is made up of a correlation detector 2 that stores a known transmission signal over a time N, provides a phase rotation to an output signal by a frequency offset, multiplies the result with a reception signal corresponding to the output signal and integrates the output signal over a time N, a frequency offset estimate device 3 that detects a change in a square sum of output signals of the correlation detector 2 with respect to phase fluctuation within a time caused by the frequency offset, that updates the estimated phase fluctuation so that the square sum is maximized and estimates the phase fluctuation within a time, and a phase compensation section 4 that eliminates the frequency offset of the reception signal based on the phase fluctuation within a time being an output of the frequency offset estimate device 3.


Inventors:
TANO SATORU
Application Number:
JP3065995A
Publication Date:
August 30, 1996
Filing Date:
February 20, 1995
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H03H21/00; H04B3/06; H04L7/00; H04L27/22; H04L27/38; (IPC1-7): H04L27/38; H03H21/00; H04B3/06; H04L7/00; H04L27/22
Attorney, Agent or Firm:
Takashi Honma