To enable stabilization so as not to depend on a frequency channel to which the power level of a periodic signal outputted by a frequency synthesizer is set by adding a circuit which makes the frequency characteristics of 1st and 2nd PLL synthesizers flat without performing test adjustment of a VCO and a power distributor.

In 1st and 2nd gain control circuits 15 and 16 to which periodic signals from 1st and 2nd PLL synthesizers 7 and 8 are inputted, a ROM 12 preliminarily record the power level of a VCO 1 in every frequency channel and correction data for attenuation quantity of a power distributor 2, a control signal being the same as a control signal to a variable frequency divider 3 is supplied to the ROM 12 from a control circuit 11, and the ROM 12 and a D-A converter 13 set attenuation quantity corresponding to a frequency channel of a variable attenuator 14 and correct a power level. Then, a periodic signal whose power level is uniform is outputted to a mixer 9 in accordance with a selected frequency channel.