Title:
周波数シンセサイザ
Document Type and Number:
Japanese Patent JP4880014
Kind Code:
B2
Abstract:
A frequency synthesizer in which a satisfactory frequency stability can be obtained over the entire long period of service immediately after power activation is disclosed. The reference signal generation circuit includes an OCXO, a TCXO, weight converters which regulate weights with respect to outputs, and an adder which adds up the outputs from the weight converters to output the added output as a reference signal. The CPU controls weight converters B and C so that the weight of the TCXO is set to 100% and the weight of the OCXO is set to 0% at the time of the power activation, so that the weight of the OCXO gradually rises, and so that the weight of the TCXO is set to 0% and the weight of the OCXO is set to 100% after preset time, whereby the frequency can quickly be stabilized after the power activation.
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Inventors:
Naoki Onishi
Application Number:
JP2009184126A
Publication Date:
February 22, 2012
Filing Date:
August 07, 2009
Export Citation:
Assignee:
Nippon Denpa Industry Co., Ltd.
International Classes:
H03L1/02; H03L3/00; H03L7/08
Domestic Patent References:
| JP8056120A | ||||
| JP2005043289A | ||||
| JP8317564A | ||||
| JP63036675A | ||||
| JP2002135235A | ||||
| JP50107040U | ||||
| JP59194519A | ||||
| JP6260932A | ||||
| JP2214222A | ||||
| JP53146560A |
Attorney, Agent or Firm:
Nobuhiro Funatsu