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Patent Searching and Data


Title:
FREQUENCY SYNTHESIZER
Document Type and Number:
Japanese Patent JPH05259904
Kind Code:
A
Abstract:

PURPOSE: To improve the phase lock-in characteristic and to increase the phase lock-in speed by eliminating the higher harmonic of the input voltage of a voltage control oscillator VCO and storing the phase error signal data for each specific frequency.

CONSTITUTION: The oscillation output frequency of a VCO 21 is kept in a variable range equal to one channel of the input voltage of the VCO 21 when the VCO 21 is started. Then the input voltage gradually approximate to a point closest to the oscillation frequency in the variable range for a single period T. When the period T is over, the period T is equal to 2T with a phase error signal 104 kept at 0. Then the input voltage range of the VCO 21 is equal to 1/2 channel and the input voltage of the VCO 21 gradually approximate to a point closest to the oscillation output frequency with double accuracy compared with the level of the period T. Therefore the oscillation output signal 108 of the VCO 21 is stabilized and the phase error data is stored in an error data table RAM 24. This error data is referred to in the next frequency setting state and the phase lock-in time can be shortened.


Inventors:
Tsurumaru Makoto
Yasushi Ozaki
Application Number:
JP1492692A
Publication Date:
October 08, 1993
Filing Date:
January 30, 1992
Export Citation:
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Assignee:
NEC
International Classes:
H03L7/06; H03L7/10; H03L7/18; (IPC1-7): H03L7/18; H03L7/06; H03L7/10
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)