PURPOSE: To enable the conversion of an input frequency signal to an analog voltage signal at a high accuracy by setting a clock pulse frequency at a higher level than an input frequency while a counter memory is provided with a sufficiently large memory capacity.

CONSTITUTION: An input frequency signal applied to an input signal terminal 1 is converted into a square wave at each positive half-cycle with an FF 2. With the output of the FF 2 as control signal, an input gate is opened and a clock pulse from a terminal 8 is fed to a counter memory 4 to count while memorized. On the other hand, the output of the FF 2 is converted into a square wave pulse synchronous to an input signal at each negative half-cycle with a phase inverting section 7 and an FF 10. With the output of the output FF 10, an output gate 5 is opened and the clock pulse memorized in the memory 4 is fed to an A/D conversion section 6 to obtain an output voltage corresponding to the input frequency. This enables the extraction of the frequency variation in the input frequency signal as that of the output voltage.