Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
GENERAL PURPOSE CIRCUIT BOARD AND FORMATION METHOD FOR ELECTRONIC CIRCUIT WIRING PATTERN ON THE BOARD
Document Type and Number:
Japanese Patent JP2568052
Kind Code:
B2
Abstract:

PURPOSE: To easily form a desired wiring pattern by inserting a jig having a burning insertion pin in the position corresponding to a through-hole provided in all intersections of a plurality of conductors disposed in parallel to the longitudinal and lateral directions on an insulating board to cut off a desired conductor by burning.
CONSTITUTION: A through-hole 2 is provided in all the intersections of a plurality of wiring patterns 1 respectively provided in parallel to the longitudinal and lateral directions on an insulating board 8. Four electrified parts 3 connected to the respective wiring patterns 1 extending to the through-hole 2 from the vertical and horizontal directions are provided in the periphery of the through- hole 2. A burning insertion jig 4 has a number of burning insertion pins 6 which are planted in the plate-like base 9 and correspond to the through-hole of the board 8. The burning insertion pins 6 are inserted into all the through-holes 2, a current is supplied to the specified burning insertion pins 6 from a connector 5, and the wiring pattern 1 between two adjacent through-holes 2 is cut off by burning. Thereby, a new desired electronic circuit wiring pattern is easily formed.


Inventors:
Suzuki Kei
Application Number:
JP23464794A
Publication Date:
December 25, 1996
Filing Date:
September 29, 1994
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NEC Data Equipment Co., Ltd.
International Classes:
H05K1/11; H05K1/00; H05K1/02; H05K3/22; H05K3/34; (IPC1-7): H05K1/02; H05K1/11; H05K3/22
Domestic Patent References:
JP61107788A
JP60106365U
JP6016577U
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)