Title:
GHOST ELIMINATING DEVICE
Document Type and Number:
Japanese Patent JPS56137776
Kind Code:
A
Abstract:
PURPOSE: To obtain constitution suitable to IC-implementation by enabling one delay circuit to generate a weighting signal required to simulate a ghost and a canceling signal.
CONSTITUTION: From inter-stage points of delay elements of delay circuit 39, outputs of weighting circuits 101∼10n are supplied and inter-stage outputs are supplied to capacitors 181∼18n, stored with weighting signals, via switch circuits 151∼15n and resistors 171∼17n. At the input side of delay element D1 at the initial stage of delay circuit 39, change-over switch 40 is provided and at the output side of delay element Dn at the final stage, synthesizer 5 is provided, so that a video signal having a ghost canceled will appear at output terminal 6.
Inventors:
UTSUNOMIYA KIMITAKE
YAMADA HISAFUMI
KURIKI CHIYOUEI
YAMADA HISAFUMI
KURIKI CHIYOUEI
Application Number:
JP4132980A
Publication Date:
October 27, 1981
Filing Date:
March 31, 1980
Export Citation:
Assignee:
SONY CORP
International Classes:
H04B1/10; H04N5/21; (IPC1-7): H04N5/48