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Title:
GNSS SIGNAL PROCESSOR
Document Type and Number:
Japanese Patent JP2016006429
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a signal processor for GPS or other GNSS radiolocalization systems which is faster, reduces memory size, simplifies circuitry and decreases power consumption.SOLUTION: The signal processor includes a RAM pre-correlation buffer 37 which is filled with samples which are generated by a sampling stage 35 whose sampling rate is governed by a programmable oscillator 350 which is set according to the Doppler shift of a satellite whose acquisition is intended, in sync with the code NCO. Thus all sample alignment in the buffer is fixed. The device further includes an amplitude compressor 36 to limit the size of the buffer memory and is optimized to provide data to a following DFT unit 60 in small bursts that can be processed in real time without the need for intermediate buffers.

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Inventors:
YOUNG PHIL
Application Number:
JP2015157437A
Publication Date:
January 14, 2016
Filing Date:
August 07, 2015
Export Citation:
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Assignee:
QUALCOMM INC
International Classes:
G01S19/33; G01S19/37; H04B1/707
Domestic Patent References:
JPH05256927A1993-10-08
JP2006254500A2006-09-21
JP2005031072A2005-02-03
JP2004534227A2004-11-11
Attorney, Agent or Firm:
Kurata Masatoshi
Yoshihiro Fukuhara
Morisezo Iseki
Okumura Motohiro



 
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