PURPOSE: To always obtain an excellent hard copy by selecting a horizontal clock number outputted from a horizontal clock number output means to he small at first and increasing the horizontal clock number gradually till a detection circuit detects the coincidence between a frequency of a sampling clock and a frequency of a video signal.

CONSTITUTION: A phase of a horizontal synchronizing signal is delayed by a phase adjustment circuit by 1/4 period of a sampling clock to obtain a clock CK'. When a CPU applies preset, a C-FF5 latches the clock CK' by a leading edge of a video signal. As a result, when the frequency of the sampling clock CK and the frequency of the video signal are coincident, an H level is always kept to an output Q2. On the other hand, in the case of coincidence, a level of the Q2 is at L in a timing S in figure and the L level is kept by the action of an AND gate 4. The CPU monitors the Q2 signal and when the level is L, the horizontal clock number given to a PLL is sequentially increased and the horizontal clock number having been given to the PLL at an H level is discriminated to be the horizontal clock number to be obtained.