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Title:
HEAT TREATMENT METHOD FOR SILICON WAFER
Document Type and Number:
Japanese Patent JP2010199411
Kind Code:
A
Abstract:

To provide a heat treatment method for a silicon wafer by RTP that can suppress slipping by forming a BMD at a high concentration in a bulk while forming a DZ layer by eliminating COP in a wafer surface layer.

In the heat treatment method for a silicon wafer, when a rapid heating/rapid cooling heat treatment is carried out on a wafer obtained by slicing a silicon single-crystal ingot manufactured by a Czochralski method, a temperature raising process includes producing a non-oxidizing gas atmosphere in which a maximum reaching temperature is 1,300°C to a fusion point of silicon and the wafer has its top surface side held in an oxidizing gas atmosphere of 20 to 100% in oxygen partial pressure at the maximum reaching temperature and has its reverse surface side held in the non-oxidizing gas atmosphere, and a temperature falling process includes holding both the top surface side and reverse surface side of the wafer in the non-oxidizing gas atmosphere.


Inventors:
ISOGAI HIROMICHI
SENDA TAKESHI
TOYODA EIJI
ARAKI KOJI
AOKI TATSUHIKO
SUDO HARUO
SENSAI KOJI
KASHIMA KAZUHIKO
Application Number:
JP2009044379A
Publication Date:
September 09, 2010
Filing Date:
February 26, 2009
Export Citation:
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Assignee:
COVALENT MATERIALS CORP
International Classes:
H01L21/322; C30B29/06; C30B33/02
Domestic Patent References:
JP2001308101A2001-11-02
JP2003056621A2003-02-26
JP2003115491A2003-04-18
JP2001102321A2001-04-13
JP2003533881A2003-11-11
JP2000031150A2000-01-28
JP2007534579A2007-11-29
JP2004228462A2004-08-12
JP2004214305A2004-07-29
JPH08255905A1996-10-01
Foreign References:
WO2005104208A12005-11-03
Attorney, Agent or Firm:
Kinoshita Shigeru
Rie Ishimura