Title:
HIGH EFFICIENCY HORIZONTAL DEFLECTING CIRCUIT
Document Type and Number:
Japanese Patent JPH01188173
Kind Code:
A
Abstract:
PURPOSE:To reduce the product of the voltage amplitude of a fly-back line pulse and a horizontal fly-back line period by adding a serial resonating circuit means, which is composed of a capacitor means and an inductor means, parallelly with a resonance capacitor. CONSTITUTION:The serial resonating circuit is connected to a horizontal deflecting circuit which is composed of a horizontal output transistor 1, a damper diode 2, a horizontal deflecting coil 3 and a resonance capacitor 4. This serial resonating circuit is composed of a capacitor 5(C3) and an inductor 6(L3). The serial resonating circuit is resonated to the about 3-fold frequency of the resonance frequency of an existing single tuning circuit. Accordingly, by this serial resonating circuit, the voltage waveform of the fly-back line period approaches a rectangular waveform much more in comparison with a sine waveform due to a conventional technique. Thus, the value of a figure of merit FM is improved.
Inventors:
OGINO MASANORI
YAMADA TAKEO
IKEDA MIYUKI
YAMADA TAKEO
IKEDA MIYUKI
Application Number:
JP1069288A
Publication Date:
July 27, 1989
Filing Date:
January 22, 1988
Export Citation:
Assignee:
HITACHI LTD
International Classes:
H04N3/16; H03K4/62; H03K4/69; (IPC1-7): H04N3/16
Domestic Patent References:
| JPS4812934A | ||||
| JPS5045234A | 1975-04-23 |
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)
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