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Title:
HIGH EFFICIENT ENCODING DEVICE AND VIDEO INFORMATION RECORDING AND REPRODUCING DEVICE
Document Type and Number:
Japanese Patent JP3699132
Kind Code:
B2
Abstract:

PURPOSE: To reduce the scale of a hardware by preparing an intrafield in which a movement compensation is not operated for every (n) field, and operating a movement compensation prediction with the intrafield in the other fields.
CONSTITUTION: When an error power is less than an original picture alternating current power, the first switch circuit 7 outputs a predictive mode signal, and when the original picture power is less than the error power, the circuit 7 outputs an intrand mode signal. That is, the circuit 7 outputs an input block or an error block as an encoded block based on the mode signal decided by a discriminating circuit 6. At that time, when the input block is the intrafield, the circuit 7 necessarily outputs the input block as the encoded block. The encoded block is inputted to a DCT circuit 8, converted into DCT coefficients, quantized into the prescribed number of bits by a quantizing circuit 9, the quantized DCT coefficients are converted into codes suited to a transmission path 11 by a first encoding circuit 10, and outputted.


Inventors:
Tomohiro Ueda
Toshihito Ito
Yoshinori Asamura
Ken Onishi
Hidetoshi Mishima
Application Number:
JP1144393A
Publication Date:
September 28, 2005
Filing Date:
January 27, 1993
Export Citation:
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Assignee:
Mitsubishi Electric Corporation
International Classes:
H04N5/92; H04N19/107; H04N19/11; H04N19/114; H04N19/137; H04N19/142; H04N19/149; H04N19/172; H04N19/176; H04N19/186; H04N19/196; H04N19/423; H04N19/43; H04N19/46; H04N19/50; H04N19/503; H04N19/51; H04N19/61; H04N19/625; H04N19/65; H04N19/70; H04N19/85; H04N19/87; H04N19/89; H04N19/91; (IPC1-7): H04N7/32; H04N5/92
Domestic Patent References:
JP410788A
JP2192378A
JP451688A
JP451689A
JP2174388A
JP4318791A
Attorney, Agent or Firm:
Shogo Takahashi
Tadahiko Inaba
Kanako Murakami
Nakatsuru Kazutaka