Title:
HIGH-ORDER INTERPOLATION FOR DIGITAL-ANALOG CONVERSION
Document Type and Number:
Japanese Patent JPS61192127
Kind Code:
A
Abstract:
Digital signals are processed by a first accumulator (26) to generate most significant bits which represent the signal to be converted but with truncation noise. The error signals from the first accumulator are processed by a second; sccumulator (36) to generate a second set of most significant bits which are used to remove the truncation noise. The most significant bits from the second accumulator are converted to analog form, differentiated and then combined with the most significant bits from the first accumulator after being converted from digital to analog form. The combined signal Is then amplified and filtered.
Inventors:
JIIMUSU CHIYAARUZU KIYANDEI
Application Number:
JP518386A
Publication Date:
August 26, 1986
Filing Date:
January 16, 1986
Export Citation:
Assignee:
AMERICAN TELEPHONE & TELEGRAPH
International Classes:
H03M1/68; G06F3/05; H03M1/00; H03M1/08; H03M1/66; H03M3/04; (IPC1-7): G06F3/05; H03M1/66
Domestic Patent References:
| JPS5698048A | 1981-08-07 |
Attorney, Agent or Firm:
Masao Okabe