PURPOSE: To improve the compatibility with conventional systems, to make the memory suitable for high density mounting and to attain high speed transfer with the same terminal number of memory element package as conventionally, by discriminating the read/write, page mode and nibble mode only with RAS and CAS.

CONSTITUTION: A clock generator CLK-GEN is made enable with a detector and generates clocks by triggering the fall of the RAS or the CAS. The detector detects the operating mode of a memory element from the RAS and the CAS and generates a control signal of the CLK-GEN and CNT. In the section A, the RAS is made active ("L" level) and the CAS is made active ("L" level) after a delay time from the RAS to the CAS, it is the same as the normal read/write and page mode and it is not detected as the nibble mode. In the section B, since the RAS is toggled as "L"→"H"→"L" while the CAS is fixed to "L" and detected as the nibble mode.