Title:
半導体ウェーハを研磨する方法
Document Type and Number:
Japanese Patent JP5581117
Kind Code:
B2
Abstract:
A semiconductor wafer is polished, wherein in a first step, the rear side of the wafer is polished by a polishing pad comprising fixedly bonded abrasives having a grain size of 0.1-1.0 mum, while supplying a polishing agent free of solid materials having a pH of at least 11.8, and, in a second step, the front side of the semiconductor wafer is polished, wherein a polishing agent having a pH of less than 11.8 is supplied. A polishing pad for use in apparatuses for polishing semiconductor wafers, has a layer containing abrasives, a layer composed of a stiff plastic and also a compliant, non-woven layer, wherein the layers are bonded to one another by means of pressure-sensitive adhesive layers.
Inventors:
Jurgen シュヴァン toner
Lorant コッペルト
Lorant コッペルト
Application Number:
JP2010125997A
Publication Date:
August 27, 2014
Filing Date:
June 01, 2010
Export Citation:
Assignee:
ジルトロニック Aktiengesellschaft Siltronic AG
International Classes:
H01L21/304; B24B37/00; B24B37/005; B24B37/12; B24B37/22; B24B37/24; B24D3/00; B24D3/28
Attorney, Agent or Firm:
Patent business corporation Fukami patent firm
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