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Patent Searching and Data


Title:
表示装置の作製方法
Document Type and Number:
Japanese Patent JP4801407
Kind Code:
B2
Abstract:

To provide a method for manufacturing a display having an inverse stagger TFT capable of high speed operation while preventing the deviation of a threshold, exhibiting high switching characteristics and presenting display excellent in contrast.

After a gate electrode is formed of a highly heat-resistant material, a layer having a catalyst element for accelerating the crystallization of an amorphous semiconductor film is formed and the amorphous semiconductor film and a layer having a donor element and a rare gas element are formed and heated to crystallize the amorphous semiconductor film and to remove the catalyst element from a crystalline semiconductor film. Subsequently, a semiconductor region is formed using a part of the crystalline semiconductor film, a source electrode and a drain electrode touching the semiconductor region electrically are formed, and a gate interconnect line connected with the gate electrode is formed, thus forming the inverse stagger TFT.

COPYRIGHT: (C)2006,JPO&NCIPI


Inventors:
Shunpei Yamazaki
Shinji Maekawa
Application Number:
JP2005285804A
Publication Date:
October 26, 2011
Filing Date:
September 30, 2005
Export Citation:
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Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L21/336; H01L21/20; H01L21/8234; H01L27/08; H01L27/088; H01L29/423; H01L29/49; H01L29/786; H01L51/50
Domestic Patent References:
JP2002124683A
JP8330602A
JP2004241770A
JP11177104A
JP2002324808A
JP2000353666A