PURPOSE: To decrease the number of transistor used in a logic circuit of a semiconductor integrated circuit device.

CONSTITUTION: The variable logical data are inputted to the gate terminal G and the drain terminal D of n-MOS TR Qn1, and the source terminal S of the TR Qn1 1 connected to the drain terminal D of an n-MOS TR Qn2 to constitute an output terminal Out1 to which a prescribed AND is outputted. The terminal S of the TR Qn2 is connected to a ground potential VSS with the terminal G connected to a power supply VDD respectively. The source-drain resistance of the TR Qn2 is set larger than that of the TR Qn1. An inverter Iv1 which inverts the signals is connected to the rear stage of the terminal Out1 so that a logic circuit of such constitution is used as a NAND circuit in an ordinary semiconductor integrated circuit.