PURPOSE: To simplify the circuit configuration by obtaining an output FSK modulation signal with high quality in which jitter is reduced and reducing number of voltage controlled oscillators than that of a conventional circuit.

CONSTITUTION: Analog switch circuits 23-26 select phase comparators 21, 28, loop filters 22, 29, voltage controlled oscillators 25, 32 and frequency dividers 27, 34 by switching signals C1-C5 from an analog switch control circuit 35 to form PLL circuits A, B, C, D. A low pass filter 24 connected in series in the changeover a change in a control voltage from the loop filters 22, 29 applied to the voltage controlled oscillator 25 is smoothed when a space signal and a mark signal in input digital data Sd are changed. The changeover in the change of the space signal and the mark signal of the input digital data Sd is repeated to send an output FSK modulation signal So without jitter.