Title:
【発明の名称】スキュー補正手段およびスキュー補正方法
Document Type and Number:
Japanese Patent JP2002519675
Kind Code:
A
Abstract:
Automatic test equipment for memory device testing with elements providing a high accuracy of transferring and receiving signals when testing a semiconductor device under test (DUT) by intelligent skew calibration of a timing system. The device for automatic skew calibration of a transceiver comprises a plurality of input registers for transmitting signals; a plurality of output registers for receiving signals; a main clock driver for generating a main clock signal; a reference clock driver for generating reference signals for calibrating the registers; the reference clock driver being associated with the main clock driver; and a plurality of phase shifters comprising at least one set of phase shifters associated with each plurality of registers, for the relative alignment of the register's timing within each plurality. The calibration is performed using a common time base which is distributed by means of a transmission line having predetermined wave characteristics.
Inventors:
Kurotochicobu, Ilya Valeryevich
Application Number:
JP2000557157A
Publication Date:
July 02, 2002
Filing Date:
June 10, 1999
Export Citation:
Assignee:
Kurotochicobu, Ilya Valeryevich
International Classes:
G01R31/28; G01R31/317; G01R31/319; G11C29/56; (IPC1-7): G01R31/28; G01R31/319; G11C29/00
Attorney, Agent or Firm:
Yukio Ono (1 person outside)