Title:
【発明の名称】システムクロックのタイミング回復を向上する装置及び方法
Document Type and Number:
Japanese Patent JPH08509346
Kind Code:
A
Abstract:
Apparatus and methods for improving timing recovery of a system clock by causing its frequency to be within a specified tolerance range during a timing recovery acquisition period for the system clock. The apparatus includes a voltage controlled oscillator for producing the system clock and a non-volatile memory containing an offset value. The non-volatile memory provides an offset value (representing an offset voltage value) which assures that the voltage controlled oscillator receives a voltage value which causes the frequency of the system clock to be within a specified tolerance range. The apparatus may also include a write control unit for determining and updating the offset value for a next timing recovery acquisition period. The methods include steps for performing these operations.
Inventors:
Huiser Cornelis
Application Number:
JP52169195A
Publication Date:
October 01, 1996
Filing Date:
February 01, 1995
Export Citation:
Assignee:
Philips Electronics Nemrose Fennaught Shap
International Classes:
H04N7/26; H03L1/00; H03L7/06; H03L7/10; H03L7/18; H04L7/033; H04N5/12; H04N21/43; (IPC1-7): H03L7/06; H04L7/033; H04N7/24
Attorney, Agent or Firm:
Masao Sawada