Title:
【発明の名称】VLSI CMOS回路を伝送路にインターフェイスするためのドライバ
Document Type and Number:
Japanese Patent JP2553779
Kind Code:
B2
Abstract:
This invention provides very wide channel, open drain, N-channel CMOS drivers (16) and cascode CMOS receivers (17) for interfacing VLSI CMOS circuits to transmission lines (14) which are terminated by their characteristic resistive impedances (21, 22) to voltage levels of the order of about 1.2 - 2.0 V. These GTL (a coined descriptor) drivers and receivers typically operate with a voltage swing of the order of about 0.8 - 1.4 V on such transmission lines for carrying out binary communications between CMOS circuits configured to operate with standard 5 V rail-to-rail voltage swings for their internal signals.
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Inventors:
UIRIAMU EFU GANINGU
Application Number:
JP6044691A
Publication Date:
November 13, 1996
Filing Date:
March 25, 1991
Export Citation:
Assignee:
XEROX CORP
International Classes:
H01L21/822; G06F13/40; H01L21/8238; H01L27/04; H01L27/092; H03K19/003; H03K19/0185; (IPC1-7): H01L21/8238; H01L21/822; H01L27/04; H01L27/092
Domestic Patent References:
| JPH01194713A |
Attorney, Agent or Firm:
Kobori Masashi