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Patent Searching and Data


Title:
MIS TYPE SEMICONDUCTOR DEVICE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPH0730108
Kind Code:
A
Abstract:

PURPOSE: To construct a polycide electrode having a stable P, N type polycrystalline silicon by ensuring a specified region of the maximum concentration of nitrogen in at least any of the areas between a semiconductor substrate and an insulating film layer, between the insulating film and a first silicon layer, and between a first silicon layer and a polycide layer.

CONSTITUTION: Element-active regions 302 and 303 and an isolation region 304 are formed and oxidized by heating on a silicon substrate 301 and a gate oxidized film 305 is formed, on which a polycrystalline silicon film 306 is deposited. After a naturally oxidized film is removed, a tungsten silicide film 307 is deposited. Next, about 1×1014/cm2 of an ionized nitrogen 324 are introduced. Subsequently, a polycide layer is treated to form a gate electrode layer and a heat treatment is performed to combine free bonds of silicon with implanted nitrogen. Consequently, when the free bond concentration is decreased and the diffusion coefficient of boron in the polycrystalline silicon is reduced to apply polycrystalline silicon as a gate electrode material, its stability can be enhanced.


Inventors:
TANAKA KAZUO
Application Number:
JP16819193A
Publication Date:
January 31, 1995
Filing Date:
July 07, 1993
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
H01L21/28; H01L21/8238; H01L27/092; H01L29/78; (IPC1-7): H01L29/78; H01L21/28; H01L21/8238; H01L27/092
Attorney, Agent or Firm:
Kisaburo Suzuki (1 outside)