Title:
MULTICHIP MODULE
Document Type and Number:
Japanese Patent JPH0794666
Kind Code:
A
Abstract:
PURPOSE: To provide an interconnection medium, which has the advantages of low-inductance power distribution and the high wiring density of signal interconnection wirings, and in which the number of interconnections is reduced. CONSTITUTION: The multichip module has first and second interconnection layers, each connecting layer contains parallel conductors, the conductors 72, 74 of the first and second interconnection layers are coordinated so as to be mutually crossed at right angles, each conductor is connected mutually so as to form power distribution planes substantially combined on each layer, and the planes are displayed on both layers. The interconnection medium can be used effectively as the multichip module.
Inventors:
RENAADO DABURIYU SHIEIPAA
Application Number:
JP5493594A
Publication Date:
April 07, 1995
Filing Date:
March 01, 1994
Export Citation:
Assignee:
UNIV ARKANSAS (US)
International Classes:
H01L23/12; H01L23/52; H01L23/538; H01L25/04; H01L25/18; H05K1/00; (IPC1-7): H01L23/522; H01L23/12
Domestic Patent References:
| JPH05343601A | 1993-12-24 | |||
| JPH0196953A | 1989-04-14 | |||
| JPS63129655A | 1988-06-02 | |||
| JPS61170470A | 1986-08-01 | |||
| JPH06295977A | 1994-10-21 |
Attorney, Agent or Firm:
Keisuke Ozawa
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