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Title:
MANUFACTURE OF HETEROJUNCTION BIPOLAR TRANSISTOR
Document Type and Number:
Japanese Patent JPH0645346
Kind Code:
A
Abstract:

PURPOSE: To reduce the damage of processing or the pollution of the surface of a semiconductor, and form a vertical emitter completely and easily by performing wet etching while applying light, which has energy larger than the energy of the band gap of a layer to serve an emitter layer to the whole surface.

CONSTITUTION: A mask patter 5 is formed on a compound semiconductor, which has heterojunction, and an emitter mesa is formed by wet etching. At that time, the wet etching is performed while applying light, which has energy larger than the energy of the band gap of a layer 2 to serve as the emitter layer of a compound semiconductor layer, to the whole topside of the compound semiconductor. For example, with a mask pattern 5, where an Al film 4 is stacked on the resist 3, as a mask, a GaAs semiconductor is soaked in phosphoric acid etchant, and while applying a laser beam vertically to the surface of the semiconductor, an n+-GaAs emitter contact layer 1 and an n-AlGaAs emitter layer 2 are etched off into desired shapes.


Inventors:
KINOSADA TOSHIAKI
Application Number:
JP19848592A
Publication Date:
February 18, 1994
Filing Date:
July 24, 1992
Export Citation:
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Assignee:
SHARP KK
International Classes:
H01L21/306; H01L21/26; H01L21/331; H01L29/205; H01L29/73; H01L29/737; (IPC1-7): H01L21/331; H01L21/26; H01L21/306; H01L29/205; H01L29/73
Attorney, Agent or Firm:
Shintaro Nogawa