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Patent Searching and Data


Title:
IC PACKAGE
Document Type and Number:
Japanese Patent JPS6354735
Kind Code:
A
Abstract:

PURPOSE: To improve grounding by forming a grounding layer under a surface conductor layer through an insulating layer, boring a window for a bonding section to the insulating layer and bonding a grounding electrode for a chip with the grounding layer.

CONSTITUTION: A grounding layer 13 is shaped closely under a surface conductor layer 11 forming a lead terminal, etc. shaped to an insulating vessel 10 consisting of ceramics, etc. housing an IC chip 14 through an insulating layer 12, windows for bonding and micro-chip loading sections are bored to said insulating layer 12, to form the windows 16. Electrodes for the IC chip 14 are bonded with the grounding layer 13 in the windows 16 by fine wires 17. A micro-chip capacitor 15 can be loaded on the grounding layer 13. Accordingly, the grounding layer 13 can be formed closely, and is not parted by a signal conductor, etc., thus improving grounding.


Inventors:
NISHIMOTO HIROSHI
MIYAUCHI AKIRA
Application Number:
JP19732486A
Publication Date:
March 09, 1988
Filing Date:
August 25, 1986
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L21/60; (IPC1-7): H01L21/60
Attorney, Agent or Firm:
Aoki Akira