PURPOSE: To shorten the processing time by using a circuit which is suited to a fixed length coding system which divides an original image into small areas of each prescribed size when the image information on the original image is compressed and stored and then codes the image information into the data of the fixed length for each divided area.
CONSTITUTION: The data have the fixed length for each block and therefore can be easily coded and encoded for each block. In other words, both a coder 12 and a decoder 16 can simultaneously read the shifted lines to reduce the burden of a CPU when the first line of a small area is read. Thus the processing speed is increased owing to a fact that both coding and encoding operations can be simultaneously carried out for each color.
| JPS5812425 | DOUBLE LAMP ANALONG/DIGITAL CONVERTER |
| JPH0656956 | [Title of Invention] Analog Digital Converter |
| WO/2022/090477 | CONFIGURABLE DAC CHANNELS |
ONISHI MASARU
YAMAUCHI NAOKI
TANIOKA MASAAKI
| JPS61144989A | 1986-07-02 | |||
| JPH02117268A | 1990-05-01 | |||
| JPS63196173A | 1988-08-15 | |||
| JPH02243081A | 1990-09-27 | |||
| JPH0495463A | 1992-03-27 |