Title:
画像符号化装置及び方法
Document Type and Number:
Japanese Patent JP4135617
Kind Code:
B2
Abstract:
It is aimed at decreasing process load for arithmetic coding and effectively providing rate control by suppressing image quality degradation. In an image encoding apparatus 1 , a code amount adding section 18 accumulates code amounts of arithmetic codes D 17 for each bit plane encoded in an EBCOT section 17 and supplies an accumulated value to a control section 19 . The control section 19 compares this accumulated value with a targeted code amount. When the accumulated value does not reach the targeted code amount, the control section 19 transmits a control signal D 19 to the EBCOT section 17 to encode the next bit plane. When the accumulated value reaches the targeted code amount, the code amount adding section 18 supplies an encoded code stream D 20 after completion of the code amount control to a header generation section 20 and a packet generation section 21 . At this time, the EBCOT section 17 encodes a quantization coefficient D 15 for each bit plane by traversing all code blocks from a bit plane having the highest bit position to a bit plane having the lowest bit position in order.
Inventors:
Takahiro Fukuhara
Kazutoshi Hosaka
Kazutoshi Hosaka
Application Number:
JP2003367809A
Publication Date:
August 20, 2008
Filing Date:
October 28, 2003
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H04N1/41; H03M7/30; H03M7/40; H04N19/102; H04N19/134; H04N19/146; H04N19/147; H04N19/196; H04N19/34; H04N19/60; H04N19/635; H04N19/85; H04N19/91
Domestic Patent References:
| JP2002165098A | ||||
| JP2003116005A | ||||
| JP2002125230A | ||||
| JP2001086506A | ||||
| JP2004064104A | ||||
| JP2004297712A |
Attorney, Agent or Firm:
Akira Koike
Eiichi Tamura
Seiji Iga
Eiichi Tamura
Seiji Iga