PURPOSE: To reduce the circuit scale by magnifying/reducing an image in the horizontal direction based on a variable sampling number of A/D conversion thereby eliminating the need for a 2-dimension digital filter.

CONSTITUTION: A number of picture elements in the horizontal direction is designated by an input section 17 of a PLL circuit 8, a frequency division ratio of a frequency divider 16 is controlled via a control section 18 to vary the frequency of a clock 9. An A/D converter section 2 samples the video signal 1 by using the clock 9 to convert the signal into a digital signal and written in a video memory 4 via an FIFO 3 and read and converted into an analog signal at a D/A converter section 6. The magnification/reduction in the vertical direction is processed by a magnification/reduction filter 5. The video memory 4, the magnification/reduction filter 5 and the D/A converter 6 or the like are controlled by a control section 12 by using a system clock 11 generated by a PLL circuit 10.