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Title:
イメージセンサ
Document Type and Number:
Japanese Patent JP4484103
Kind Code:
B2
Abstract:

To operate both an analog circuit and a digital circuit independently, and to reduce an influence on the operation of the analog circuit affected by the noise of the digital circuit even in a higher operating frequency while suppressing the circuit scale of an additional circuit for timing-controlling both the circuits from being enlarged.

An image sensor 11 for high-speed imaging (analog/digital mixed system) comprises an operation timing control circuit 11B. This circuit 11B comprises means 31, 32A each generating a first clock signal for analog operation from a main clock signal, a means 32B for multiplying the first clock signal by the delay of a predetermined amount, and a means 32C for generating a second clock signal for digital operation based on the delayed first clock signal. The means 32C generates the second clock signal, so that a temporally final clock pulse corresponding to each processing period of analog operation can stop within a processing period.

COPYRIGHT: (C)2006,JPO&NCIPI


Inventors:
Shoji Kawahito
Tomohiko Nagase
Toru Inoue
Application Number:
JP2004157875A
Publication Date:
June 16, 2010
Filing Date:
May 27, 2004
Export Citation:
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Assignee:
Photolon Co., Ltd.
National University Corporation Shizuoka University
International Classes:
H04B15/00; H03K5/05; H03M1/12; H04N1/028; H04N5/335; H04N5/341; H04N5/365; H04N5/369; H04N5/374; H04N5/378
Domestic Patent References:
JP6225185A
JP2028707A
JP11242530A
JP2003224778A
JP2003087639A
Attorney, Agent or Firm:
Hisashi Hatano
Shunguchi Sekiguchi