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Title:
IMAGING SYSTEM
Document Type and Number:
Japanese Patent JP3884226
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To use only one type for a signal processing clock by driving a CCD with a prescribed frequency.
SOLUTION: In a preprocessing circuit 28, there are arranged a preamplifier 130 for amplifying CCD output signals, a TG 131 for supplying a sampling signal along with a drive signal and a division circuit 132 for dividing a clock in frequency to be supplied from an image processing circuit 29. A floating circuit 135 of the image signal processing circuit 29 is provided with a CDS circuit 137 for correlation double sampling of image signals and an A/D conversion circuit 138 for the conversion of output signals thereof from analog to digital. An A/D conversion output is inputted into a line memory 139 and a reading out frequency is converted by the line memory 139 by a reading clock (WCK) divided in frequency in the division circuit 132.


Inventors:
Akihiko Mochida
Katsuyuki Saito
Makoto Tsunakawa
Hideki Tashiro
Noboru Kusamura
Kotaro Ogasawara
Application Number:
JP2000309674A
Publication Date:
February 21, 2007
Filing Date:
October 10, 2000
Export Citation:
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Assignee:
Olympus Endo Technology America Inc.
International Classes:
A61B1/04; G02B23/24; A62B1/04; H04N5/225; H04N5/232; H04N7/18; A61B1/05; (IPC1-7): A61B1/04; G02B23/24; H04N5/225; H04N5/232; H04N7/18
Domestic Patent References:
JP1297044A
JP2000083182A
JP10118032A
Attorney, Agent or Firm:
Susumu Ito