Title:
Impedance control of a switch using a source of high impedance voltage for providing more efficient clocking
Document Type and Number:
Japanese Patent JP6063047
Kind Code:
B2
Abstract:
A clock system of an integrated circuit includes first and second transistors forming a switch that is used when switching the clock system between a resonant mode of operation and a non-resonant mode of operation. An inductor forms a resonant circuit with capacitance of the clock system in resonant mode. The switch receives a clock signal and supplies the clock signal to the inductor when the switch is closed and disconnects the inductor from the clock system when the switch is open. First and second high impedance voltage sources supply respective first and second voltages to the switch and a gate voltage of the first transistor transitions with the clock signal around the first voltage and a gate voltage of the second transistor transitions with the clock signal around the second voltage such that near constant overdrive voltages are maintained for the first and second transistors.
Inventors:
Vis Weiss S. Sate
Samuel Dee. Nafchiger
Samuel Dee. Nafchiger
Application Number:
JP2015530050A
Publication Date:
January 18, 2017
Filing Date:
August 29, 2013
Export Citation:
Assignee:
ADVANCED MICRO DEVICES INCORPORATED
International Classes:
G06F1/10; G06F1/32; H03K17/687
Foreign References:
| US20110084736 | ||||
| US6882182 |
Attorney, Agent or Firm:
Yuji Hayakawa
Ryota Sano
Keisuke Murasame
Ryota Sano
Keisuke Murasame