Title:
INCIRCUIT EMULATOR
Document Type and Number:
Japanese Patent JP2713124
Kind Code:
B2
Abstract:
PURPOSE: To provide the incircuit emulator which maintains the real time responsiveness of a target system regardless of the break state at the time of debugging.
CONSTITUTION: A microprocessor 1, a memory 2 for emulator, an emulator control circuit 3, a mask circuit 5, an INT status display circuit 8, a return instruction detecting circuit 9, a flag 10, and an OR circuit 11 are provided for a target system 6 to be debugged and a host device 4, and the INT status display circuit 8 which always monitors a user INT interrupt signal 101 and directly transmits its state to the host device, the return instruction detecting circuit 9 which detects the end signal of a user interrupt program on a main control bus 104 and transmits it to the microprocessor 1, and the flag 10 where procedure contents for switching from the user state to the break state are stored are provided as additional constituting elements.
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Inventors:
Kazuya Matsukawa
Application Number:
JP30137793A
Publication Date:
February 16, 1998
Filing Date:
December 01, 1993
Export Citation:
Assignee:
NEC
International Classes:
G06F11/22; (IPC1-7): G06F11/22
Domestic Patent References:
| JP4199336A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)