Title:
【発明の名称】集積回路
Document Type and Number:
Japanese Patent JP2936807
Kind Code:
B2
Abstract:
For a test operation on a main circuit without supplying a test signal from a test unit, an integrated circuit device includes, a supplementary or test circuit in addition to the main circuit. A test signal is produced in the test circuit and is supplied to the main circuit. Responsive to the test signal, the main circuit produces a data signal. The test circuit processes the data signal into a result signal representative of a result of the test operation. The result signal is supplied to a peripheral or test unit which is well known in the art. It is preferable that the test circuit carries out the test operation with reference to a combination of a particular signal having a predetermined cycle and a particular phase and a specific signal having the predetermined cycle and a specific phase which is different from the particular phase.
Inventors:
MOMOSE HIRONARI
Application Number:
JP17149491A
Publication Date:
August 23, 1999
Filing Date:
July 12, 1991
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
G01R31/3185; G01R31/28; (IPC1-7): G01R31/28
Domestic Patent References:
| JP61204746A | ||||
| JP53108243A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)