PURPOSE: To enhance the reliability of a system by duplexing the region where the faults of memory devices lead to system down to the memory devices which operate respectively independently.

CONSTITUTION: The addresses of a memory block where transfer request modules MDs 2W5 are duplexed and stored in memory devices 8, 9 are beforehand stored in a duplexing assignment address register 100. The transfer control information from the MDs 2W5 is sent via a transfer change-over circuit 500 to a priority order assigning circuit 101 and an informaion change-over circuit 102, where transfer information 240 is selected. The information 240 is sent to the device 8, and is also compared with the addresses of the register 100 in a decision circuit 103, whereby the addresses to be duplexed are decided. The output of the circuit 103 controls the information 240 as a duplexing assignment signal in a duplexing transfer control circuit 104, and the transfer information and the duplexing assignment signal are sent, by way of a priority order assigning circuit 111 and an information change- over circuit 112, to the device 9 where they are stored in the same address as that of the device 8. The return signals from the devices 8, 9 are returned via a transfer change-over part 501.