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Title:
INFORMATION PROCESSING APPARATUS, DIAGNOSTIC METHOD, AND PROGRAM
Document Type and Number:
Japanese Patent JP2015184049
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To determine a fault location without using other devices, an idle line, and a plurality of comparators.SOLUTION: An information processing apparatus includes: a signal line; first resistors provided in sections of the signal line; transmitting means for putting the signal line into a disconnected state; receiving means for detecting abnormality of the signal line; reception state transmitting means for transmitting the abnormality of the signal line; first selecting means for connecting the signal line; a second resistor installed between the first selecting means and a power supply voltage; third resistors corresponding to the resistors of the signal line; second selecting means for selecting the third resistor; a fourth resistor installed between the second selecting means and the power supply voltage; comparing means for comparing the voltage of the first selecting means with the voltage of the second selecting means; and diagnosis control means for disconnecting the signal line when receiving the abnormality, controlling the first selecting means to connect the signal line to the comparing means, and diagnosing a faulty section of the signal line on the basis of the comparison results of the comparing means when controlling the second selecting means to connect one of the third resistors to the comparing means.

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Inventors:
FUKUYAMA NAGANORI
Application Number:
JP2014058559A
Publication Date:
October 22, 2015
Filing Date:
March 20, 2014
Export Citation:
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Assignee:
NEC CORP
International Classes:
G01R31/08; G01R31/02
Domestic Patent References:
JPH07143038A1995-06-02
JP2009103465A2009-05-14
JPS5752871A1982-03-29
JPS61108232A1986-05-26
JPS5679966A1981-06-30
JP2001142793A2001-05-25
Foreign References:
US4529970A1985-07-16
Attorney, Agent or Firm:
Masahiko Desk
Naoki Shimosaka



 
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