To provide an information processing system capable of reducing power consumption, a power supply in the information processing system, and a control method for a clock.

A changeover control section 85 is shifted to a "clock supply stop" state when a standby time WT1 is an access detection waiting time AWT or more (WT1≥AWT) in an "access standby" state. In the "clock supply stop" state, a state dependent clock control signal CSS is set to an inactive level to stop the supply of a system clock to a sub system bus 40. Subsequently, when a standby time WT2 becomes a clock stop stable time CSST or more (CSST≤WT2), the changeover control section 85 is shifted to a "power supply stop state". In the "power supply stop state", a state dependent power supply control signal PSS is set to an inactive level to stop power supply to a non-interface section of the sub system bus 40.