PURPOSE: To make a storage reference which is locked at a high speed by starting the execution of operation without setting a read operand in an arithmetic execution means when an instruction which requires a long reference time is decoded.
CONSTITUTION: An instruction control part 10 reads an instruction to be executed next out of a buffer storage 20, sets the instruction in an instruction register IR, and decodes it to indicate the number of operation kinds to an arithmetic execution part 60. An operand buffer 40 holds the operand from the storage 20 temporarily in an entry into an internal queue. The entry number is generated when the control part 10 decodes the instruction and reported to the operand control part 40 of the storage 20. The operand of the instruction is sent out to the execution part 60 according to the entry number. The execution part 60 performs operation indicated from the control part 10. When an operand read becomes necessary, the execution part 60 sends a read request to the control part 10. When operand fetch becomes necessary, the execution part 60 requests an operand control part 50 to fetch the operand. The control part 50 informs the buffer 40 of the entry number.
SHINTANI YOICHI
SHONAI TORU
