Title:
INFORMATION PROCESSOR
Document Type and Number:
Japanese Patent JP3547550
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide an information processor which uses a high speed method for saving a flag operation procedure even if instruction simulation considering interruption is executed.
SOLUTION: An instruction string for executing instruction simulation is analyzed before instruction simulation is started and timing when interruption may be generated is predicted. An interruption generation part 3 generates a notice interruption signal before one instruction cycle when interruption is generated based on the predicted result. When an instruction of execution immediately after this has a flag saving instruction identifier, an execution part 4 executes the instruction immediately after in accordance with an instruction code with flag instead of the flag saving instruction code.
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Inventors:
Takahiro Tokuyoshi
Application Number:
JP2529996A
Publication Date:
July 28, 2004
Filing Date:
February 13, 1996
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G06F9/30; G06F9/38; G06F9/455; G06F9/48; G06F11/28; (IPC1-7): G06F9/46; G06F11/28
Domestic Patent References:
| JP3168836A | ||||
| JP1205347A | ||||
| JP6358550A | ||||
| JP62194549A | ||||
| JP6208480A |
Attorney, Agent or Firm:
Hidekazu Miyoshi
Yasuo Miyoshi
Iwa Saki Kokuni
Kawamata Sumio
Yasuo Miyoshi
Iwa Saki Kokuni
Kawamata Sumio
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