PURPOSE: To attain the retrial of an instruction generating an error in CPU.

CONSTITUTION: CPU includes CSVR 4 storing the same contents as CVR 3 one cycle behind. When an error is generated in an arithmetic unit 1, at the same time when an error flag becomes active, data at the time of the generation of the error is written into SVR 3. That the error becomes active deters writing into CSVR 4. In this case, the contents in CSVR 4 are restored in SVR 3 so as to retry the instruction generating the error. On the other hand, when the error is detected in CSVR 4, the contents in CSV 3 are restored in CSVR 4 and retried. The error is processed under the control of a diagnostic processor. Whether to mediate a firmware for generating timing of shifting control to the diagnostic processor or not is indicated by setting a mode flag.