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Patent Searching and Data


Title:
INPUT AND OUTPUT CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPS5943429
Kind Code:
A
Abstract:

PURPOSE: To improve the utilization efficiency of a CPU and to speed up the response to an input/output device, by providing an input/output controller with a comparing and deciding circuit, and comparing input/output data in DMA transfer without the intervention of a program.

CONSTITUTION: The comparing and deciding circuit 22 is actuated when DMA transfer is performed. Reference value holding registers 12W14 are provided in the comparing and deciding circuit 22 and a reference decision value is inputted from the CPU and held. This reference value is compared by a comparator 36 with input data transferred on DMA basis and the result is held in a comparing and deciding register 32. The contents of this register 32 are read by the CPU to discriminate the state of the transfer data easily. The reference value for decision is used normally for the purpose of the detection of an abnormal value or specific data, so it is hardly detected by this deciding circuit 22 and the efficiency of the CPU is improved as compared with decision by a program.


Inventors:
TAKAHASHI NOBORU
Application Number:
JP15364482A
Publication Date:
March 10, 1984
Filing Date:
September 03, 1982
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G06F13/28; (IPC1-7): G06F3/00
Domestic Patent References:
JPS5633748A1981-04-04
JPS56166538A1981-12-21
JPS545636A1979-01-17
JPS5690324A1981-07-22
JPS5743236A1982-03-11
JPS51134038A1976-11-20
JPS5396631A1978-08-24
Attorney, Agent or Firm:
Masatoshi Isomura