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Patent Searching and Data


Title:
INPUT PROTECTIVE CIRCUIT
Document Type and Number:
Japanese Patent JPH04159773
Kind Code:
A
Abstract:

PURPOSE: To prevent the malfunction of an internal circuit by providing a plurality of diodes connected in series by insertion in the forward direction or Zener diodes connected in the reverse direction and resistances connected between the gates of the second NMOS transistors and earth.

CONSTITUTION: This input protective circuit is constituted by incorporating diodes 1 and 2 and 1-8, NMOS transistors 3 and 4, and resistance 5 and 9. When a power supply voltage is restored or made, the bias voltage VB which is the gate potential of the transistor 4 starts to rise after the power supply voltage becomes 3×VF and the transistor 4 is soon turned on and the NMOS transistor 3 is turned off. When the transistor 4 is turned on, VIN rapidly rises to VDD+VF. The malfunction caused by the inversion of an input signal when the VIN and VDD are inverted can be prevented by adjusting the rise of the bias potential VB. Therefore, the malfunction of an internal circuit caused by an input voltage can be prevented.


Inventors:
TANAKA HIROKO
Application Number:
JP28488090A
Publication Date:
June 02, 1992
Filing Date:
October 23, 1990
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L27/04; H01L21/822; H01L21/8238; H01L27/092; (IPC1-7): H01L27/04; H01L27/092
Attorney, Agent or Firm:
Uchihara Shin