Title:
EXAMINATION SYSTEM, EXAMINATION-PURPOSE INFORMATION PROCESSING TERMINAL, AND PROGRAM
Document Type and Number:
Japanese Patent JP2023112578
Kind Code:
A
Abstract:
To provide an art that enables a user to easily check a state of a part of an examination object as to a substrate where an electronic component having a solder bonding-purpose metal bump formed on a package bottom surface is mounted.SOLUTION: An examination system for a substrate where an electronic component having a solder bonding-purpose metal bump with a mounting substrate of the electronic component formed on a mounting bottom surface is mounted has: three-dimensional date creation means that creates three-dimensional data on the substrate using information on a plurality of X-ray images taken by X-ray imaging means; review-purpose image creation means that creates a review-purpose image showing a shape of a solder of a solder bonding part as a second-dimensional shape of a review surface of user desire, using the three-dimensional data; and display means that displays the image created by the review-purpose image creation means.SELECTED DRAWING: Figure 3
Inventors:
KARITA YUJI
KASAHARA KEIGA
KASAHARA KEIGA
Application Number:
JP2022014459A
Publication Date:
August 14, 2023
Filing Date:
February 01, 2022
Export Citation:
Assignee:
OMRON TATEISI ELECTRONICS CO
International Classes:
G01N23/04; G01N23/044; G01N23/046
Attorney, Agent or Firm:
Patent Attorney Corporation Shuwa Patent Office