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Title:
INSULATED GATE FIELD EFFECT TRANSISTOR
Document Type and Number:
Japanese Patent JPS57136371
Kind Code:
A
Abstract:

PURPOSE: To contrive to reduce input resistance and to reduce noise of an insulated gate field effect transistor by a method wherein the gate electrode part is constituted of a high melting point metal, and the gate electrode extended part extending from the gate electrode part thereof over a semiconductor substrate is constituted of a material having conductivity higher than that of the high melting point metal material mentioned above.

CONSTITUTION: The gate electroded extende part 3' extended from the gate electrode 2 over the semiconductor substrate 1 is formed with any of Al, gold, silver, platinum being the material having conductivity higher than that of the high melting point material to form the gate electrode parts 2, 21, 22. Resistance of the gate extended part 3' can be almost ignored as compared with resistance of the gate electrode parts 2, 21, 22, and input resistance is reduced. Especially it is effective at an MOSFET when the gate electrode 2 is formed to have comb- teeth structure. In this figure, the drain region is indicated as 4, the source region is as 5, a drain electrode is as 6, a source electrode is as 7, a gate bonding pad is as 8, a drain bonding pad is as 9, and a source bonding pad is indicated as 10 respectively. Accordingly low noise characteristic can be obtained.


Inventors:
UMEBACHI SHIYOUTAROU
MIYANO MASAHIKO
Application Number:
JP2212881A
Publication Date:
August 23, 1982
Filing Date:
February 16, 1981
Export Citation:
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Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
H01L21/28; H01L29/43; H01L29/78; (IPC1-7): H01L29/54
Domestic Patent References:
JPS5122348A1976-02-23
JPS4734100A