Title:
INTEGRATED CIRCUIT AND METHOD FOR FORMING WIRING THEREOF
Document Type and Number:
Japanese Patent JP2005064124
Kind Code:
A
Abstract:
To provide an integrated circuit and a method for forming wiring of the same by which a complicated wiring pattern can be formed by simultaneous irradiation of light using a mask, and as a result, the wiring formation step can be simplified and automated, refinement of the wiring pattern can be eased, and the integration of the integrated circuit can be improved.
An organic material that changes in resistivity by optical irradiation and in solubility to a solvent is used to form wiring with a single layer or multiple layers.
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Inventors:
KASAMA YASUHIKO
OMOTE KENJI
OMOTE KENJI
Application Number:
JP2003290300A
Publication Date:
March 10, 2005
Filing Date:
August 08, 2003
Export Citation:
Assignee:
IDEAL STAR INC
International Classes:
H01L21/3205; H01L21/8234; H01L23/52; H01L27/088; H01L27/28; H01L29/786; H01L51/00; H01L51/05; H01L51/30; H01L51/40; (IPC1-7): H01L21/3205; H01L21/8234; H01L27/088; H01L29/786; H01L51/00
Attorney, Agent or Firm:
Hisao Fukumori
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