Title:
INTEGRATED CIRCUIT PERFORMING MULTIPLEX COMMUNICATION TASK
Document Type and Number:
Japanese Patent JP3774255
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To obtain the integrated circuit equipped with a multiplex communication function.
SOLUTION: The integrated circuit 24 includes a memory 70 which stores audio encoding algorithm, echo cancel information, modulating process algorithm, and audio data. This memory is coupled with a signal converter, a central processor, and a 1st coprocessor through a data bus 50. The signal converter provides an analog-digital input port and a digital-analog output port for the integrated circuit. The audio data are received through the analog-digital input port. The central processor performs at least part of the audio encoding algorithm for the audio data and itemizes the 1st part of the modulating process algorithm. The 1st coprocessor implement echo canceling algorithm.
Inventors:
Shea-Cyan Wen
Walter You Quenast
Paul M Astrachan
Donald Sea Anderson
Peter Sea Curtis
Jose G. Coreet
Walter You Quenast
Paul M Astrachan
Donald Sea Anderson
Peter Sea Curtis
Jose G. Coreet
Application Number:
JP29885695A
Publication Date:
May 10, 2006
Filing Date:
October 24, 1995
Export Citation:
Assignee:
Freescale Semiconductor, Inc.
International Classes:
H03H21/00; H03H17/02; H04B1/00; H03M7/30; H04B1/40; H04B3/23; H04M9/08; (IPC1-7): H04B1/00; H03H17/02; H03H21/00; H03M7/30; H04B3/23
Domestic Patent References:
| JP4278740A | ||||
| JP4023063A | ||||
| JP2184958A | ||||
| JP5183450A |
Attorney, Agent or Firm:
Kazuo Shamoto
Tadashi Masui
Yasushi Kobayashi
Akio Chiba
Hiroyuki Tomita
Tadashi Masui
Yasushi Kobayashi
Akio Chiba
Hiroyuki Tomita
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