INTEGRATED CIRCUIT TESTING METHOD UNDER MIXED PRESENCE OF SIGNALS AND DEVICE THEREFOR

Japanese Patent JP3437872

B2

PURPOSE: To test mutual connection between integrated circuits in an environment of mixed presence of signals by connecting electronic parts of each IC selectively to test buses by multiple switches, and feeding a programmable constant current to the parts to specify the value of the parts from voltage generated to the buses.
CONSTITUTION: Part of a circuit tester is mounted on a circuit in order to measure mutual connection between mixed signal ICs 16, 18 and to measure resistances R6-11, capacities C1-3, and the like. The ICs 16, 18 are respectively provided with TAP control circuits 24, 26, and TCK and TMS are inputted to control a data register 28. The register 28 has stages 30-44 and 46-60 so as to control multiple elements 70-100 respectively provided with a pair of switches. That is, passive parts mounted on the circuit board are selectively connected to an input-output conductor of a main analog circuit 20 or 22 or test buses 102, 104. A constant current from a generator 12 is then fed to the passive parts, and analog voltage generated to the output end of a amplifier 10 is A/D-converted 14 and sent to a CPU 120.

Karl Willmar Thatcher
Stig Herman Oresjo
John Elliott MacDermid
Kenneth paul hoodie

JP10400094A

August 18, 2003

May 18, 1994

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Ford Motor Company

G01R27/02; G01R31/04; G01M17/007; G01R31/28; G01R31/3167; G01R31/317; (IPC1-7): G01R31/28; G01R27/02

JP1299473A
JP1237472A
JP1127973A
JP60149980A

Akira Asamura (3 outside)

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