Title:
INTERCONNECTION STRUCTURE OF INTEGRATED STRUCUTRE
Document Type and Number:
Japanese Patent JPH04233275
Kind Code:
A
Abstract:
PURPOSE: To avoid damages on a device by applying a fluorine-based dry etching process which is good in selectivity with respect to silicon and polycrystalline silicon, when local part mutually connecting structure of diffusion regions in a semiconductor integrated circuit is manufactured. CONSTITUTION: Two diffusion regions 12, 12 which are isolated by oxide 26 for isolation are formed on the surface of a substrate 14 of an integrated circuit 10. Local part mutually connecting structure 28 stretches, covering the oxide 26 for isolation and electrically connects the two diffusion regions 12, 12. This local part mutually connecting structure 28 is manufactured by applying a dry etching process, using a fluorine-based chemical material to tungsten silicide stuck on the oxide 26 for isolation.
Inventors:
SAAMA ESU GANTOURI
KURISUCHIYAN KUREINAATO
KURISUCHIYAN KUREINAATO
Application Number:
JP18361691A
Publication Date:
August 21, 1992
Filing Date:
June 28, 1991
Export Citation:
Assignee:
TEXAS INSTRUMENTS INC
International Classes:
H01L21/308; H01L21/28; H01L21/3205; H01L21/3213; H01L21/768; H01L23/52; H01L23/532; H01L29/43; (IPC1-7): H01L21/308; H01L21/3205; H01L29/46
Attorney, Agent or Firm:
Akira Asamura (3 outside)