Title:
INTERFACE CIRCUIT
Document Type and Number:
Japanese Patent JPS59211316
Kind Code:
A
Abstract:
PURPOSE: To prevent malfunction due to noise at input interruption and also to attain freely the setting of duty by using two comparators and a flip-flop.
CONSTITUTION: An input sinusoidal wave is inputted to the two comparators COMP1, COMP2 via a transformer Tr. The threshold level of the comparator COMP1 is V1 and that of the COMP2 is V2. An output of both comparators is inputted respectively to the flip-flop FF. Then, even if the threshold level of the comparators is set to a considerably high level, the duty is not deteriorated.
Inventors:
OOHATA MICHINOBU
KAJIWARA MASANORI
TAKEDA SATOSHI
NAKADE HIROSHI
TAKEO HIROSHI
KAJIWARA MASANORI
TAKEDA SATOSHI
NAKADE HIROSHI
TAKEO HIROSHI
Application Number:
JP8533983A
Publication Date:
November 30, 1984
Filing Date:
May 16, 1983
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H04L25/03; H03K12/00; H03K17/22; (IPC1-7): H03K3/02; H04L25/03
Attorney, Agent or Firm:
Sadaichi Igita