Title:
INTERFERENCE COMPENSATION DEVICE
Document Type and Number:
Japanese Patent JP2888174
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To improve the convergence to a synchronization state by providing an output of a signal or a prescribed value obtained by holding a correlation signal outputted from N-sets of taps, respective, based on an asynchronizing signal outputted from a demodulator.
SOLUTION: A multiplier 21 multiplies an input base band signal with an error signal E from a subtractor 16 in each of taps 31-3n to obtain an instantaneous correlation value. The obtained instantaneous correlation value is fed to an integration device 22, where the signal is averaged in terms of time and correlation signals C1-CN. are generated. The signals C1-CN are fed to a limit value control circuit 17 and also to a corresponding limit device 25. After the correlation is limited below a limit value by limit signals L1-LN received by the circuit 17, the result is fed to the multiplier 23 as a tap coefficient, in which an input base band signal is multiplied as a tap signal. The tap signal is added by an adder 14 and the result, is fed to a discrimination device 15 and a subtractor 16, from which an error signal E is outputted.
More Like This:
Inventors:
KUROE JUZO
Application Number:
JP18697295A
Publication Date:
May 10, 1999
Filing Date:
July 24, 1995
Export Citation:
Assignee:
NIPPON DENKI KK
International Classes:
H03H21/00; H04B1/10; H04B3/06; H04B7/005; (IPC1-7): H04B7/005; H03H21/00; H04B3/06
Domestic Patent References:
| JP575498A | ||||
| JP1136429A | ||||
| JP7321719A |
Attorney, Agent or Firm:
Matsuura